SN74LVC2G04DCKR Dual Inverter Gate with 1.65V to 5.5V Wide Voltage 32mA Output Drive Ultra-Low Power 3.4ns Speed Tiny SC-70 Package & ESD Protection for Space-Constrained Designs

SN74LVC2G04DCKR Dual Inverter Gate with 1.65V to 5.5V Wide Voltage 32mA Output Drive Ultra-Low Power 3.4ns Speed Tiny SC-70 Package & ESD Protection for Space-Constrained Designs

Features

• Available in the Texas Instruments NanoFree™ Package 1

• Supports 5-V VCC Operation

• Inputs Accept Voltages to 5.5 V

• Maxtpd of 4.1 ns at 3.3 V

• LowPower Consumption, 10-μA Max ICC

• ±24-mA Output Drive at 3.3 V

• Typical VOLP (Output Ground Bounce) <0.8 V at VCC = 3.3 V, TA = 25°C

• Typical VOHV (Output VOH Undershoot) >2 V at VCC = 3.3 V, TA = 25°C

• Ioff Supports Partial-Power-Down Mode Operation

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II

• ESDProtection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

Applications

• IPPhones: Wired and Wireless

• Optical Modules

• Optical Networking: EPON and Video Over Fiber

• Point-to-Point Microwave Backhaul

• Power: Telecom DC/DC Module: Analog and Digital

• Private Branch Exchanges (PBX)

• TETRABase Exchanges

• Telecom Base Band Units

• Telecom Shelters: Power Distribution Units (PDU), Power Monitoring Units (PMU), Wireless Battery Monitoring, Remote Electrical Tilt Units (RET), Remote Radio Units (RRU), Tower Mounted 1 Amplifiers (TMA)

• Vector Signal Analyzers and Generators

• Video Converencing: IP-Based HD

• WiMAXandWireless Infrastructure Equipment

• Wireless Communications Testers and Wireless Repeaters

• xDSLModems and DSLAM

Description

This dual inverter is designed for 1.65-V to 5.5-V VCC operation. The SN74LVC2G04 device performs the Boolean function Y = A.

NanoFree package technology is a major breakthrough in IC packaging concepts, using the die as the package.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

INFORMATION

Drawing

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